An electrostatic discharge circuit is applied to a semiconductor circuit to prevent the semiconductor circuit from malfunctioning (e.g., damaged or broken) due to electrostatic discharge (ESD). Devices, such as a silicon controlled rectifier (SCR), an NPN bipolar transistor with an open base, or the like may be used during ESD.
A voltage at which current starts to flow through an electrostatic discharge circuit is referred to as a trigger voltage. When the trigger voltage is high, elements of a semiconductor circuit may be damaged or broken before ESD is performed by the electrostatic discharge circuit.
After the electrostatic discharge circuit is triggered, a cathode voltage of the electrostatic discharge circuit is maintained to be constant. This voltage is referred to as a holding voltage. When the holding voltage is low, the semiconductor circuit may malfunction. Furthermore, a latch-up phenomenon may occur in the electrostatic discharge circuit.